Etching apparatus and method

ABSTRACT

A method includes forming an inner chamber in a process chamber of a plasma processing apparatus, the inner chamber having smaller volume than the process chamber. At least one gas is introduced into the inner chamber, and flow of the at least one gas into the inner chamber is measured. The flow of the at least one gas is adjusted to a desired rate, and a wafer is processed by the at least one gas at the desired rate while the inner chamber is not formed.

BACKGROUND

The semiconductor integrated circuit (IC) industry has experiencedexponential growth. Technological advances in IC materials and designhave produced generations of ICs where each generation has smaller andmore complex circuits than the previous generation. In the course of ICevolution, functional density (i.e., the number of interconnecteddevices per chip area) has generally increased while geometry size(i.e., the smallest component (or line) that can be created using afabrication process) has decreased. This scaling down process generallyprovides benefits by increasing production efficiency and loweringassociated costs. Such scaling down has also increased the complexity ofprocessing and manufacturing ICs.

BRIEF DESCRIPTION OF THE DRAWINGS

Aspects of the present disclosure are best understood from the followingdetailed description when read with the accompanying figures. It isnoted that, in accordance with the standard practice in the industry,various features are not drawn to scale. In fact, the dimensions of thevarious features may be arbitrarily increased or reduced for clarity ofdiscussion.

FIGS. 1-2 are views of an etching apparatus according to embodiments ofthe present disclosure.

FIGS. 3A-3C are further views of an etching apparatus according tovarious aspects of the present disclosure.

FIGS. 4A-4B are views illustrating a method of processing a waferaccording to various aspects of the present disclosure.

FIGS. 5A-6B are views illustrating an etching operation according tovarious aspects of the present disclosure.

DETAILED DESCRIPTION

The following disclosure provides many different embodiments, orexamples, for implementing different features of the provided subjectmatter. Specific examples of components and arrangements are describedbelow to simplify the present disclosure. These are, of course, merelyexamples and are not intended to be limiting. For example, the formationof a first feature over or on a second feature in the description thatfollows may include embodiments in which the first and second featuresare formed in direct contact, and may also include embodiments in whichadditional features may be formed between the first and second features,such that the first and second features may not be in direct contact. Inaddition, the present disclosure may repeat reference numerals and/orletters in the various examples. This repetition is for the purpose ofsimplicity and clarity and does not in itself dictate a relationshipbetween the various embodiments and/or configurations discussed.

Further, spatially relative terms, such as “beneath,” “below,” “lower,”“above,” “upper” and the like, may be used herein for ease ofdescription to describe one element or feature's relationship to anotherelement(s) or feature(s) as illustrated in the figures. The spatiallyrelative terms are intended to encompass different orientations of thedevice in use or operation in addition to the orientation depicted inthe figures. The apparatus may be otherwise oriented (rotated 90 degreesor at other orientations) and the spatially relative descriptors usedherein may likewise be interpreted accordingly.

Terms such as “about,” “roughly,” “substantially,” and the like may beused herein for ease of description. A person having ordinary skill inthe art will be able to understand and derive meanings for such terms.For example, “about” may indicate variation in a dimension of 20%, 10%,5% or the like, but other values may be used when appropriate. A largefeature, such as the longest dimension of a semiconductor fin may havevariation less than 5%, whereas a very small feature, such as thicknessof an interfacial layer may have variation of as much as 50%, and bothtypes of variation may be represented by the term “about.”“Substantially” is generally more stringent than “about,” such thatvariation of 10%, 5% or less may be appropriate, without limit thereto.A feature that is “substantially planar” may have variation from astraight line that is within 10% or less. A material with a“substantially constant concentration” may have variation ofconcentration along one or more dimensions that is within 5% or less.Again, a person having ordinary skill in the art will be able tounderstand and derive appropriate meanings for such terms based onknowledge of the industry, current fabrication techniques, and the like.

Semiconductor fabrication generally involves the formation of electroniccircuits by performing multiple depositions, etchings, annealings,and/or implantations of material layers, whereby a stack structureincluding many semiconductor devices and interconnects between isformed. Dimension scaling (down) is one technique employed to fit evergreater numbers of semiconductor devices in the same area. However,dimension scaling is increasingly difficult in advanced technologynodes. Etching techniques employed by etchers for removing portions of amaterial layer(s) according to a pattern use ever lower etching gas flowrates to achieve smaller feature sizes. Minimum feature dimension (or,“critical dimension (CD)”) and feature profile are both improved byaccurate gas flow. Insufficient gas flow, for example, may correlatewith unsatisfactory CD and increased defect count.

Etching gas flow may be verified by in-situ and/or ex-situ gas flowverification apparatuses. However, for certain processes that use smallgas flow rates (e.g., 1 sccm or less), a large error rate associatedwith the in-situ verification apparatus decreases viability of using thein-situ verification apparatus at the etcher. The ex-situ gas flowverification apparatus has a smaller chamber volume, which aids inaccurate measurement of etching gas flow rate, such that small gas flowrate measurement accuracy is viable in the ex-situ gas flow verificationapparatus. However, gas delivery behavior into the etcher may bedifficult to correlate with gas delivery behavior into the ex-situ gasflow verification apparatus.

In embodiments of the present disclosure, etcher chamber volume isconfined by moving parts, which leads to improved in-situ small gas flowverification due to reduced chamber volume. Real-time optical emissionspectroscopy (OES) and off-line etching rate measurement are enabled, aswell. These innovations may be extended to the entire plasma etcheroperation. Small gas flow verification for minimum feature dimensionplasma processes are implemented. Both measurement of gas flow behaviorinto the etcher and higher flow control accuracy are achieved, enablingimproved etcher tool matching and wafer process stability.

FIG. 1 is a schematic view of an etching apparatus 100, according tovarious embodiments of the disclosure. In some embodiments, the etchingapparatus 100 is configured for performing etching and deposition. Asshown in FIG. 1 , the etching apparatus 100 includes a process chamber110, and a source of radio frequency (RF) power 120 configured toprovide RF power in the process chamber 110. The etching apparatus 100also includes an electrostatic chuck 130 within the process chamber 110,and the electrostatic chuck 130 is configured to receive a wafer 105.The etching apparatus 100 also includes a chuck electrode 135, and asource of direct current (DC) power 140 connected to the chuck electrode135. The source of DC power 140 is configured to provide power to thechuck electrode 135. The etching apparatus 100 also includes a gassource 310 configured to introduce process and/or carrier gases into theprocess chamber 110. The etching apparatus 100 further includes a flowverification unit 320 configured to measure and/or verify flow rate ofthe process and/or carrier gases into the process chamber 110. In someembodiments, the flow verification unit 320 is a manometer. In someembodiments, the flow verification unit 320 is in fluidic communicationwith the process chamber 110.

In some embodiments, the etching apparatus 100 is a plasma etchingapparatus. In some embodiments, the etching apparatus 100 is any plasmaetching or dry etching tool that produces a plasma from a process gas,typically oxygen, chlorine-bearing gas, or fluorine-bearing gas, anduses a radio frequency electric field. In some embodiments, the etchingapparatus 100 is an ion-beam etcher, reactive ion etcher, or the like.In other embodiments, instead of an etching apparatus, a plasmadeposition apparatus is used, such as a plasma-enhanced atomic layerdeposition (PEALD) apparatus or the like. The plasma etching apparatusand the plasma deposition apparatus may be collectively referred to asplasma processing apparatuses.

In some embodiments, the wafer 105 includes a single crystallinesemiconductor layer on at least its surface. In some embodiments, thewafer 105 includes a single crystalline semiconductor material such as,but not limited to Si, Ge, SiGe, GaAs, InSb, GaP, GaSb, InAlAs, InGaAs,GaSbP, GaAsSb, and InP. In some embodiments, the wafer 105 is made ofSi. In some embodiments, the wafer 105 is a silicon wafer. In someembodiments, the wafer 105 is a semiconductor-on-insulator substratefabricated using separation by implantation of oxygen (SIMOX), waferbonding, and/or other suitable methods, such as a silicon-on-insulator(SOI) substrate, a silicon germanium-on-insulator (SGOI) substrate, or agermanium-on-insulator (GOI) substrate. In some embodiments, the wafer105 is a Si wafer having a mirror polished surface on one side or bothsides. In some embodiments, the wafer 105 includes one or moreintegrated circuit (IC) dies in an intermediate (unfinished) stage offabrication, such that plasma etching or deposition is performed on atleast a topmost layer of each of the IC dies by the etching apparatus100.

In some embodiments, the process chamber 110 includes an upper portion112 and a lower portion 114, which may include at least one conductivematerial, such as aluminum, as well as other non-conductive materials.The upper portion 112 includes an upper electrode 113, in someembodiments. In some embodiments, the lower portion 114 includes aninsulating ceramic frame 116 and includes the electrostatic chuck 130within the insulating ceramic frame 116. For example, the electrostaticchuck 130 is disposed within the insulating ceramic frame 116 within thelower portion 114 of the process chamber 110, as shown in FIG. 1 . Insome embodiments, the electrostatic chuck 130 includes a conductivesheet, which serves as the chuck electrode 135. As shown in FIG. 1 , thechuck electrode 135 is connected to the source of DC power 140. When aDC voltage from the source of DC power 140 is applied to the chuckelectrode 135 of the electrostatic chuck 130 having the wafer 105disposed thereon, a Coulomb force is generated between the wafer 105 andthe chuck electrode 135. The Coulomb force attracts and holds the wafer105 on the electrostatic chuck 130 until the application of the DCvoltage from the source of DC power 140 is discontinued.

In some embodiments, in order to improve the heat transfer between thewafer 105 and the electrostatic chuck 130, one or more gases, such as Heor Ar, is introduced between the wafer 105 and the electrostatic chuck130 by the gas source 310. In some embodiments, the gas dissipates heatgenerated between the wafer 105 and the electrostatic chuck 130 duringthe application of the DC voltage.

As illustrated in FIG. 1 , the etching apparatus 100 also includes apump 160 connected to the process chamber 110. The pump 160 isconfigured to provide a vacuum or maintain a certain gas pressure withinthe process chamber 110. In some embodiments, the pressure within theprocess chamber 110 is maintained by the combination of the gas or gasesbeing introduced by the gas source 310 and a level of pumping performedby the pump 160. In some embodiments, the pressure within the processchamber 110 is maintained solely by pumping with the pump 160.

In some embodiments, the source of RF power 120 is turned on to apply aplasma 125 for plasma etching operations. The source of RF power 120 maybe configured to generate an RF signal operating at a set frequency(e.g., 13.56 MHz), which transfers energy from the source of RF power120 to the gas within the processing chamber 110. When sufficient powerhas been delivered to the gas, a plasma is ignited. In some embodiments,the power applied during the etching operations ranges from about 200watts to about 700 watts. In some embodiments, application of an RFpulse occurs for a duration of about 10 seconds to about 60 seconds.

In some embodiments, the etching apparatus 100 further includes achamber confinement assembly including upper and lower actuators 170,175, lift plate 176, and sealing ring 178. The chamber confinementassembly is configured to form an inner chamber 115 having reducedvolume relative to the process chamber 110 to improve measurement and/orverification accuracy by the flow verification unit 320, which isdescribed in further detail with reference to FIG. 2 .

In some embodiments, the upper actuator 170 is configured to shiftposition of the upper electrode 113 with high precision over a range ofabout 0 mm to about 30 mm. In some embodiments, the precision over therange of the upper actuator 170 is in a range of about 0 mm to about0.02 mm. In some embodiments, the upper actuator 170 includes a servomotor 171 and a ball screw 172. The ball screw 172 is attached to theupper portion 112 including the upper electrode 113. The servo motor 171controls extension and retraction of the ball screw 172 to shift theposition of the upper electrode 113 in the vertical direction, which isindicated by an axis “Z” in FIG. 1 . The vertical direction may besubstantially perpendicular to a major surface of the upper electrode113 and a major surface of the electrostatic chuck 130.

In some embodiments, the lower actuator 175 is configured to shiftposition of the lift plate 176 and sealing ring 178 with high precisionover a range of about 0 mm to about 20 mm. In some embodiments, theprecision over the range of the lower actuator 175 is in a range ofabout 0 mm to about 0.02 mm. In some embodiments, the lower actuator 175includes a servo motor 173 and a ball screw 174. The ball screw 174 isattached to the lift plate 176, which is in turn attached to the sealingring 178. The servo motor 173 controls extension and retraction of theball screw 174 to shift the position of the sealing ring 178 in thevertical direction (e.g., the Z axis of FIG. 1 ).

In some embodiments, the sealing ring 178 is substantially annular, andsurrounds the electrostatic chuck 130. The sealing ring 178 may havethickness in the Z direction of at least about 20 mm. In someembodiments, the sealing ring 178 is a focus ring or edge ring. In someembodiments, the sealing ring 178 is separate from a focus ring or edgering, for example, laterally surrounding the focus or edge ring orlaterally surrounded by the focus ring or edge ring. In embodiments inwhich a separate focus or edge ring is present, the focus ring may beutilized for achieving a more uniform plasma distribution over theentire surface of the wafer 105 and for restricting the distribution ofthe plasma cloud to only the wafer surface area. In order to survivehigh temperature and hostile environments, the focus ring is frequentlyconstructed of a ceramic material such as quartz. In some embodiments,the sealing ring 178 is constructed of ceramic material such as quartz,or other suitable material. In some embodiments, the sealing ring 178includes a different material from the focus ring.

In some embodiments, a protective coating 190 is present on at least anupper surface of the sealing ring 178 facing the plasma 125. In someembodiments, the protective coating 190 further covers at least an innersidewall of the sealing ring 178 facing the plasma 125 (see FIG. 3B). Insome embodiments, the protective coating 190 further covers an outersidewall of the sealing ring 178 facing away from the plasma 125 (seeFIG. 3B). The coating 190 may be formed on the respective surfaces ofthe sealing ring 178 as a thin film coating using another coatingapparatus and advantageously prior to the installation of the processkit within the etching apparatus 100. The coating apparatus used to formthe coating 190 may be a PVD, physical vapor deposition, or a CVD,chemical vapor deposition apparatus. The coating 190 may be a thin filmcoating and may have a thickness less than 20 microns, but otherthicknesses may be used in other embodiments. In some embodiments, thecoating 190 may include thickness of 5 microns. In some embodiments, thecoating 190 may be an yttria coating (e.g., Y2O3) or a sapphire-likecoating formed using PVD or CVD or other suitable thin film depositionprocesses.

In some embodiments, the lift plate 176 includes a horizontal baseportion 179 and vertical extension(s) 177. In some embodiments, a centerof the base portion 179 is substantially aligned with a center of thesealing ring 178 along the Z direction. In some embodiments, the baseportion 179 is substantially annular, and has diameter less than outerdiameter of the sealing ring 178 and greater than inner diameter of thesealing ring 178. In some embodiments, the inner diameter of the sealingring 178 is separated from the electrostatic chuck 130 by less thanabout 0.1 mm. In some embodiments, the inner diameter of the sealingring 178 is substantially the same as the outer diameter of theelectrostatic chuck 130, such that the sealing ring 178 sits flush withthe electrostatic chuck 130. Separating the electrostatic chuck 130 fromthe sealing ring 178 by more than about 0.1 mm may lead to inaccuratemeasurement of gas flow by the flow verification unit 320. In some otherembodiments, the sealing ring 178 and the electrostatic chuck 130 may beseparated by intervening structure, e.g., the focus ring or edge ring,such that a separation greater than about 0.1 mm, or even greater thanabout 20 mm, is desirable. The outer diameter of the sealing ring 178may be greater than the inner diameter of the sealing ring 178 by avalue in a range of about 5 mm to about 30 mm. The difference of theouter and inner diameters of the sealing ring 178 is a thickness (in theX direction) of the sealing ring 178. The thickness being less thanabout 5 mm may lead to insufficient ability to form a seal when reducingthe chamber size to that of the inner chamber 115, which may furthercontribute to inaccuracy in measurement of gas flow by the flowverification unit 320.

In some embodiments, the center of the base portion 179 is in physicalcontact with the ball screw 174. In some embodiments, the verticalextensions 177 are positioned substantially at the periphery, e.g., theouter edge, of the base plate 176. In some embodiments, the verticalextension 177 is a single ring structure which extends vertically upwardfrom the base plate 176. In some embodiments, the vertical extensions177 include at least three pins or pegs that extend vertically from thebase plate 176 to contact the sealing ring 178. The vertical extensions177 have a first end in contact with (e.g., monolithically formed with)the base plate 176, and a second end in contact with the sealing ring178. In some embodiments, the vertical extensions 177 extend through theceramic frame 116 and the chuck electrode 135.

In some embodiments, the vertical extensions 177 have height in the Zdirection, and thickness in the radial direction from the center of thebase portion 179, e.g., the X direction for the cross-sectionaldepiction of the vertical extensions 177 shown in FIG. 1 . In someembodiments, a ratio of the thickness of the vertical extensions 177 tothe thickness of the sealing ring 178 is in a range of about 0.1 to 1(e.g., the thicknesses are the same). The thickness of the verticalextensions 177 being less than about 0.1 times the thickness of thesealing ring 178 may lead to insufficient strength of the verticalextensions 177, such that the vertical extensions 177 may be damaged,e.g., by warping or breaking.

In FIG. 1 , the chamber confinement assembly including the upper andlower actuators 170, 175, lift plate 176, and sealing ring 178 is in aretracted position. In the retracted position, the upper surface of thesealing ring 178 may be substantially flush with an upper surface of theelectrostatic chuck 130, and the wafer 105 is generally exposed to theprocess chamber 110 in full. The ball screws 172, 174 may be fullyretracted. In some embodiments, in the retracted position, the verticalextensions 177 are disengaged (e.g., separated by a distance) from thesealing ring 178. In some embodiments, the vertical extensions 177 arein physical contact with the sealing ring 178 in the retracted position.

In an extended position, shown in FIG. 2 , the upper surface of thesealing ring 178 may be in physical contact with a lower surface of theupper electrode 113. As such, the inner chamber 115 is formed when theupper and lower actuators 170, 175, the lift plate 176, and the sealingring 178 are in the extended position, with sidewalls of the innerchamber 115 including the upper surface of the electrostatic chuck 130,inner sidewall(s) of the sealing ring 178, and lower sidewall of theupper electrode 113. The ball screws 172, 174 may be fully extended. Insome embodiments, in the extended position, the vertical extensions 177are engaged (e.g., in physical contact with) the sealing ring 178, andthe ball screw 174 is engaged with the base plate 176. In someembodiments, as shown in FIG. 2 , in the extended position, theprotective coating 190 of the sealing ring 178 is in physical contactwith the upper electrode 113. Forming the inner chamber 115 effectivelycuts off as much as about 80% of volume of the process chamber 110, insome embodiments. The confined volume of the inner chamber 115significantly improves small gas flow verification accuracy by the flowverification unit 320. In some embodiments, ratio of volume of the innerchamber 115 to volume of the process chamber is in a range of about 10%to about 50%. If the ratio is greater than about 50%, the increase insmall gas flow verification accuracy may be insufficient to achieveacceptable etcher tool matching between actual small gas flow andmeasured small gas flow.

It may be desirable to exhaust gas from the inner chamber 115 during,for example, measurement of gas flow into the inner chamber 115 (see,for example, FIG. 3A). As such, in some embodiments, at least oneopening may be present in any of the sealing ring 178, the protectivecoating 190, the electrostatic chuck 130, the chuck electrode 135, theceramic frame 116, or the upper electrode 113. In some embodiments, anopening in the sealing ring 178 is in fluidic communication with theinner chamber 115 and the process chamber 110. In some embodiments, theopening has diameter in a range of about 0.25 mm to about 2.5 mm. Insome embodiments, the opening has cross-sectional area in a range ofabout 0.0625 mm² to about 6.25 mm². In some embodiments, the innerchamber 115 is fully sealed with no openings present in the sealing ring178, the protective coating 190, the electrostatic chuck 130, the chuckelectrode 135, the ceramic frame 116, or the upper electrode 113.

Further to FIG. 1 , the etching apparatus 100 also includes a spectraland/or charge monitoring system 180. The spectral and/or chargemonitoring system 180 is configured to monitor surface charge level. Insome embodiments, continuous or periodic monitoring by the spectraland/or charge monitoring system 180 provides a user with a history orprofile of the etching apparatus 100 throughout the etching apparatus'sservice life, or in some instances, any time period of the etchingapparatus's service life. In some embodiments, the spectral and/orcharge monitoring system 180 includes at least an optical emissionspectrometer for performing optical emission spectroscopy (OES). In someembodiments, the sealing ring 178 is substantially transparent to allowanalysis of gases inside the inner chamber 115 by the spectral and/orcharge monitoring system 180, for example, during measurement of the gasflow during verification (FIG. 3A) or real-time detection of plasmagenerated inside the inner chamber 115 (FIG. 3B).

FIGS. 3A-3C are views of the etching apparatus 100 during small gas flowverification (FIG. 3A), real-time detection of plasma generated insidethe inner chamber 115 (FIG. 3B), and wafer etching by plasma withetching rate measurement and real-time detection inside the processchamber 110 (FIG. 3C). Some elements of the chamber confinementapparatus are not shown in FIGS. 3A-3C for ease of illustration. FIG. 4Aillustrates a flow chart of operations for processing the wafer 105using the etching apparatus 100 including the chamber confinementassembly. In some embodiments, order of the operations of FIG. 4A may berearranged, some of the operations may be performed simultaneously,additional or fewer operations may be performed, or other reasonablealterations may be made.

In FIG. 3A, during small gas flow verification, a small gas flow 300 isintroduced into the inner chamber 115 while the sealing ring 178 is inthe extended position (refer to description corresponding to FIG. 2 ),corresponding to operations 400 and 410 of process 40 in FIG. 4A. Insome embodiments, the small gas flow 300 is introduced by the gas source310 in fluid communication with the inner chamber 115. In someembodiments, substantially no gas is introduced into regions of theprocess chamber 110 outside the inner chamber 115, such thatsubstantially all gas introduced by the gas source 310 flows into theinner chamber 115. In some embodiments, the inner chamber 115 issubstantially sealed, e.g., having substantially no exhaust path bywhich the gas may exit the inner chamber 115. In some embodiments, thegas source 310 may store and introduce any of a number of suitableprocess and/or carrier gases into the inner chamber 115. The gases mayinclude NF3, O2, C4F8, C4F6, He, CH3F, H2, CO, Ar, or any other suitableprocess or carrier gas. In some embodiments, flow rate of the small gasflow 300 is less than about 1 sccm.

While the gas(es) are introduced to the inner chamber 115, the flowverification unit 320 measures flow of the gas(es) into the innerchamber 115, corresponding to operation 420 of the process 40 in FIG.4A. In some embodiments, the flow verification unit 320 measurespressure of the gas in the inner chamber 115. In some embodiments, theflow verification unit 320 includes or has a data connection to aprocessing unit (not shown). In some embodiments, the processing unitreceives at least two pressure measurements at different times duringintroduction of the gas(es) to the inner chamber 115.

In some embodiments, the flow of the gas(es) is measured by a rate ofrise calculation, which is illustrated in FIG. 4B. In some embodiments,the rate of rise calculation determines the flow of the gas(es) byaveraging a change in pressure between the at least two pressuremeasurements over time between the at least two pressure measurements.In some embodiments, the gas(es) is introduced to the inner chamber 115starting at an initial time t_(i), and the flow of the gas(es) isstopped at a final time t_(f). Prior to the initial time t_(i), theinner chamber 115 may be sealed, and pressure in the inner chamber 115may be reduced to substantially vacuum, or another suitable pressurehigher than vacuum but low enough to allow for accurate flowmeasurement, e.g., less than about 100 kPa. After the final time t_(f),the flow of the gas(es) is stopped, and the pressure in the innerchamber 115 settles to a settled pressure P_(s). In some embodiments,time duration between the initial time t_(i) and the final time t_(f) isin a range of about 0.5 minutes to about 10 minutes.

Between the initial time t_(i) and the final time t_(f), correspondingto the dashed line 470 shown in FIG. 4B, the at least two pressuremeasurements may be made by the flow verification unit 320. For example,a first pressure P_(m1) may be measured at first time t_(m1)corresponding to the dot 480A, a second pressure P_(m2) may be measuredat second time t_(m2) following the first time t_(m1) corresponding tothe dot 480B, a third pressure P_(m3) may be measured at third timet_(m3) following the second time t_(m2) corresponding to the dot 480C,and a fourth pressure P_(m4) may be measured at fourth time t_(m4)following the third time t_(m3) corresponding to the dot 480D. The flowmay then be calculated based on the average rise in the pressure overthe time passed, e.g., as slope of the dashed line 470, which may befitted based on at least one of the dots 480A-480D. While four pressuresP_(m1)-P_(m4) are measured in the embodiment illustrated in FIG. 4B,fewer or more pressures may be measured, and the slope of the dashedline 470 may be calculated based on at least two of the pressuresmeasured.

Based on the Ideal Gas Equation (or “Ideal Gas Law”), PV=nRT, thepressure in the inner chamber 115 may be temperature-dependent. As such,in addition to the pressure measurements described with reference toFIG. 4B, in some embodiments, temperature of the inner chamber 115 isalso measured at the first through fourth times t_(m1)-t_(m4). In someembodiments, the flow is calculated based on the first through fourthpressures P_(m1)-P_(m4), the first through fourth times t_(m1)-t_(m4)and first through fourth temperatures T_(m1)-T_(m4) (not separatelyillustrated).

In the retracted position, the flow verification unit 320 is generallyunable to measure the flow rate of less than about 1 sccm. In theextended position, with the inner chamber 115 formed, the flowverification unit 320 is able to measure the flow rate of less thanabout 1 sccm, and the measurement by the flow verification unit 320 hasgood accuracy (e.g., error rate within about +/−0.8%) due to as much asa five-fold reduction in effective chamber volume by use of the chamberconfinement assembly. Based on the measurement by the flow verificationunit 320, the flow rate of the gas(es) may be adjusted by the gas source310 to a desired rate, corresponding to operation 430 of the process 40in FIG. 4A. Due to the reduced volume of the inner chamber 115, timespent on performing the rate of rise test may be shortened, as time toevacuate the inner chamber 115 may be shorter, and time betweenintroducing the gas(es) to the inner chamber 115 and reachingsubstantially linear pressure rise may also be shorter.

In FIG. 3B, plasma 125 is generated in the inner chamber 115 with thesealing ring 178 in the extended position (refer to descriptioncorresponding to FIG. 2 ). As shown in FIG. 3B, the plasma 125 may begenerated while no wafer (e.g., the wafer 105) is present in the innerchamber 115. In some embodiments, the plasma 125 is generated in theinner chamber 115 with a wafer present. In some embodiments, the waferin the inner chamber 115 during generation of the plasma 125 is a dummywafer, a test wafer, a bare silicon wafer, or other suitable wafer forcharacterizing the plasma 125. Characterization of the plasma 125 and/orother conditions of the inner chamber 115 may be performed by thespectral and/or charge monitoring system 180. In some embodiments, thespectral and/or charge monitoring system 180 performs optical emissionspectroscopy to measure an emission spectrum in the inner chamber 115 tocharacterize at least chemical and/or physical state of the plasmaprocess. In some embodiments, the plasma 125 is generated in the innerchamber 115 while the flow rate of the gas(es) introduced by the gassource 310 is less than about 1 sccm. Based on the characterization bythe spectral and/or charge monitoring system 180, adjusted processparameters including pressure, temperature, DC voltage, or othersuitable process parameters, may be generated, corresponding tooperation 440 of the process 40 in FIG. 4A.

In some embodiments, the sealing ring 178 is formed of a transparentmaterial, such as quartz or glass, which allows for OES measurementthrough the sealing ring 178 while the sealing ring 178 is in theextended position. In some embodiments, the sealing ring 178 is formedof a base material that is opaque or semitransparent, and includes aport that is transparent and aligned with the spectral and/or chargemonitoring system 180 to allow measurement of the emission spectrum ofthe plasma 125 by the spectral and/or charge monitoring system 180through the port. In some embodiments, the port is or comprises quartz,glass, or other suitable transparent material that can withstand theharsh environment of the inner chamber 115 during formation of theplasma 125.

In FIG. 3C, the inner chamber 115 is released by retracting the sealingring 178 and/or the upper portion 112, corresponding to operation 450 ofthe process 40 in FIG. 4A. With the inner chamber 115 released, a plasmaoperation, such as etching or deposition, is performed to process thewafer 105 using the gas(es) at the desired flow rate and the adjustedprocess parameters, corresponding to operation 460 of the process 40 inFIG. 4A. The plasma operation is performed with the wafer 105 exposed tothe process chamber 110. As the desired flow rate is calibrated prior tothe plasma operation, etching or deposition of materials on the wafer105 may be performed with a highly accurate small gas flow, allowing forformation of features having smaller minimum dimension with greateryield. One such operation is illustrated in FIGS. 5A-5B. During theplasma operation, the spectral and/or charge monitoring system 180 maymeasure etching rate and/or perform real-time characterization of theplasma 125 by OES. The etching rate measurement performed by thespectral and/or charge monitoring system 180 during the plasma operationmay be a real-time endpoint detection (EPD) operation, in someembodiments.

In FIGS. 5A-5B, a semiconductor device 50 in an intermediate stage ofproduction is illustrated. In some embodiments, the semiconductor device50 includes a plurality of transistors. In some embodiments, thetransistors are fin-type field effect transistors (FinFETs),gate-all-around FETs (GAAFETs), or another type of transistor. In someembodiments, each transistor includes a gate electrode 521 overlying asemiconductor fin 510. In some embodiments, regions of the semiconductorfin 510 on either side of each gate electrode 521 are doped to formsource/drain features (not separately labeled). Each gate electrode 521is abutted on either side by a gate spacer 522. A hard mask 524 overlieseach gate electrode 521. In some embodiments, an oxidation layer 523 isbetween each gate electrode 521 and the corresponding hard mask 524. Anprotection layer 570 overlies sidewalls of the hard mask 524 and gatespacer 522, as well as portions of the semiconductor fin 510 between thegate electrodes 521. A first dielectric layer 530, which may be aninterlayer dielectric (ILD), laterally isolates the gate electrodes 521,and extends from the protection layer 570 or the semiconductor fin 510to the upper surfaces of the hard mask 524 and the protection layer 570.

In the operation shown in FIGS. 5A-5B, a plasma-enhanced etching process500 is performed on the semiconductor device 50. In some embodiments,the plasma-enhanced etching process 500 is consistent with the plasmaoperation described with reference to FIGS. 3A-3C and FIG. 4A. In someembodiments, the plasma-enhanced etching process 500 is performed usinga flow rate of process and/or carrier gas(es) less than about 1 sccm,such as about 0.3 sccm to about 1 sccm, by the etching apparatus 100.

In some embodiments, the plasma-enhanced etching process 500 isperformed to remove portions of a second dielectric layer 540 overlyingthe first dielectric layer 530, portions of the first dielectric layer530 between the gate electrodes 521 and overlying the protection layer570, and portions of the protection layer 570 between the gateelectrodes 521 and overlying the semiconductor fin 510. In someembodiments, the plasma-enhanced etching process 500 includes multipleetching operations using different process conditions and process gasesto remove the different materials of the second dielectric layer 540,the first dielectric layer 530, and the protection layer 570, withoutremoving the material of the semiconductor fin 510. In some embodiments,a second hard mask 550 overlies the second dielectric layer 540, and theplasma-enhanced etching process 500 is performed through an opening inthe second hard mask 550 that exposes the portions of the seconddielectric layer 540, the first dielectric layer 530 and the protectionlayer 570. In some embodiments, a cap oxide layer 560 is over the secondhard mask 550.

In FIG. 5B, following the plasma-enhanced etching process 500, the capoxide layer 560 is removed, and the exposed portions of the seconddielectric layer 540, the first dielectric layer 530 and the protectionlayer 570 are also removed. In the plasma-enhanced etching process 500,the protection layer 570 may be alternately removed and deposited in asequence of etch/deposition cycles. In some embodiments, the protectionlayer 570 is a polymer. If the flow rate is too high during depositionor too low during etching, the protection layer 570 may build up,leading to overhang. If the flow rate is too low during deposition ortoo high during etching, the protection layer 570 may be consumedcompletely, leading to gradual loss of the hard mask 524 during etching.Dashed line 580 illustrates in phantom a typical etch profile consistentwith use of an inaccurate flow rate, which is generally a problem below1 sccm if the inner chamber 115 is not used to enhance matching prior tothe plasma-enhanced etching process 500. The inaccurate (typicallylower) flow rate is correlated with undesirable overhang from theprotection layer 570 and insufficient etching depth in the firstdielectric layer 530, leading to poor minimum dimension and/or defectperformance, which is described in detail with reference to FIG. 6A. Byusing the etching apparatus 100 with improved gas flow rate control, thedesired flow rate may be achieved with very low error rate, resulting inlittle or no overhang from the protection layer 570, improved etchingdepth through the entire first dielectric layer 530, and good contactbetween the source/drain regions and source/drain contacts formed insubsequent operations, which is described in detail with reference toFIG. 6B. As such, minimum dimension performance is improved, and rate ofdefects is reduced.

In FIG. 6A, an inaccurate flow rate results in a first recess widthW_(REC1), a first overhang width W_(OH1) and a first hard mask lossheight H_(HML1). In FIG. 6B, an accurate flow rate results in a secondrecess width W_(REC2), a second overhang width W_(OH2) and a second hardmask loss height H_(HML2). Due to the accurate flow rate, the secondoverhang width W_(OH2) is less than the first overhang width W_(OH1),such that the second recess width W_(REC2) is greater than the firstrecess width W_(REC1) by as much as 1 nm or more. The greater secondrecess width W_(REC2) increases contact area, which lowers contactresistance. The second hard mask loss height H_(HML2) is also less thanthe first hark mask loss height H_(HML1), the difference there betweenbeing as much as 1 nm or more.

While the description of FIGS. 5A-6B is provided with relation toformation of source/drain contacts in a FinFET or GAAFET semiconductordevice, in some embodiments, the plasma-enhanced etching process 500 maybe utilized in many other process operations used to etch a variety ofmaterials. In some embodiments, the plasma-enhanced etching process 500is utilized in recessing a dielectric layer prior to source/drainepitaxy, replacing a dummy gate, forming interconnect line or viaopenings, or other suitable operations.

Embodiments may provide advantages. The etching apparatus 100 includingthe chamber confinement assembly allows for highly accurate, in-situverification of gas flow rate using real conditions, such that the gasflow rate may be calibrated precisely prior to performing the plasmaoperation (etch or deposition) on a production wafer. As such, accurateminimum dimension control and low defect rate are achieved. Real-timeOES detection and offline etch rate measurement are also provided byembodiments of the etching apparatus 100.

In accordance with at least one embodiment, a method comprises: formingan inner chamber in a process chamber of a plasma processing apparatus,the inner chamber having smaller volume than the process chamber;introducing at least one gas into the inner chamber; measuring flow ofthe at least one gas into the inner chamber; adjusting the flow of theat least one gas to a desired rate; and processing a wafer by the atleast one gas at the desired rate while the inner chamber is not formed.

In accordance with at least one embodiment, a method comprises: shiftingan upper portion of an etching apparatus vertically downward from afirst position to a second position by an upper actuator; and shifting asealing ring of a lower portion of the etching apparatus verticallyupward from a third position to a fourth position by a lower actuator.While the upper portion is in the second position and the sealing ringis in the fourth position, the method further comprises: introducing atleast one gas into the inner chamber; measuring at least two pressuresof the inner chamber; and determining flow rate of the at least one gasbased on the at least two pressures. A wafer is processed after themeasuring while the upper portion is in the first position and thesealing ring is in the third position.

In accordance with at least one embodiment, an apparatus comprises aprocess chamber, an electrostatic chuck in the process chamber, asealing ring in the process chamber and laterally surrounding theelectrostatic chuck, and a chamber confinement assembly configured toshift position of the sealing ring vertically to establish an innerchamber in the process chamber.

The foregoing outlines features of several embodiments so that thoseskilled in the art may better understand the aspects of the presentdisclosure. Those skilled in the art should appreciate that they mayreadily use the present disclosure as a basis for designing or modifyingother processes and structures for carrying out the same purposes and/orachieving the same advantages of the embodiments introduced herein.Those skilled in the art should also realize that such equivalentconstructions do not depart from the spirit and scope of the presentdisclosure, and that they may make various changes, substitutions, andalterations herein without departing from the spirit and scope of thepresent disclosure.

What is claimed is:
 1. An apparatus, comprising: a process chamber; an electrostatic chuck in the process chamber; a sealing ring in the process chamber and laterally surrounding the electrostatic chuck; and a chamber confinement assembly configured to shift position of the sealing ring vertically to a first position to establish an inner chamber in the process chamber during a flow verification process, and to shift position of the sealing ring to a second position to flow gas into the process chamber during processing of a wafer.
 2. The apparatus of claim 1, further comprising: a flow verification unit configured to measure flow of the gas into the inner chamber during the flow verification process.
 3. The apparatus of claim 1, wherein a ratio of volume of the inner chamber to volume of the process chamber is in a range of about 0.1 to about 0.5.
 4. The apparatus of claim 1, wherein the chamber confinement assembly is further configured to shift position of an upper portion of the process chamber vertically toward the sealing ring when establishing the inner chamber.
 5. The apparatus of claim 1, further comprising an upper electrode configured to supply radio frequency power to generate a plasma in the process chamber.
 6. The apparatus of claim 5, wherein the chamber confinement assembly is further configured to shift the position of the sealing ring vertically to contact the upper electrode.
 7. The apparatus of claim 5, further comprising a spectral and/or charge monitoring system configured to measure characteristics of the plasma in the inner chamber.
 8. An apparatus, comprising: a process chamber; an electrostatic chuck in the process chamber; a sealing ring in the process chamber and laterally surrounding the electrostatic chuck; a chamber confinement assembly configured to form an inner chamber in the process chamber during a flow verification process, and to remove the inner chamber during processing of a wafer, the inner chamber having smaller volume than the process chamber; and a gas source configured to: introduce at least one gas into the inner chamber; and introduce the at least one gas at a selected rate while the inner chamber is not formed.
 9. The apparatus of claim 8, further comprising a flow verification unit configured to measure flow of the gas into the inner chamber during the flow verification process.
 10. The apparatus of claim 8, wherein the inner chamber has about 10% to about 50% smaller volume than the process chamber.
 11. The apparatus of claim 8, wherein the chamber confinement assembly is further configured to: shift position of the sealing ring vertically toward an upper portion of the process chamber.
 12. The apparatus of claim 11, wherein when the chamber confinement assembly shifts the position, the chamber confinement assembly shifts the position of the sealing ring vertically until the sealing ring contacts at least an upper electrode of the upper portion.
 13. The apparatus of claim 8, further comprising an upper electrode configured to supply radio frequency power to generate a plasma in the process chamber.
 14. The apparatus of claim 13, further comprising a spectral and/or charge monitoring system configured to measure characteristics of the plasma in the inner chamber.
 15. An apparatus, comprising: a process chamber; an electrostatic chuck in the process chamber; a sealing ring in the process chamber and laterally surrounding the electrostatic chuck; a chamber confinement assembly including: an upper actuator configured to shift an upper portion of the process chamber vertically downward from a first position to a second position; and a lower actuator configured to shift the sealing ring vertically upward from a third position to a fourth position; and a gas source configured to: while the upper portion is in the second position and the sealing ring is in the fourth position, introduce at least one gas into an inner chamber formed between the upper portion and the sealing ring; and while the upper portion is in the first position and the sealing ring is in the third position, introduce the at least one gas at a selected flow rate into the process chamber to process a wafer.
 16. The apparatus of claim 15, wherein the chamber confinement assembly comprises: a horizontal base portion in contact with the lower actuator; and a vertical extension in contact with the horizontal base portion and the sealing ring.
 17. The apparatus of claim 16, wherein the lower actuator comprises a ball screw configured to be extended by a servo motor.
 18. The apparatus of claim 15, further comprising: an optical emission spectrometer configured to measure characteristics of a plasma in the inner chamber; wherein the sealing ring includes at least a portion aligned with the optical emission spectrometer, the portion being substantially transparent.
 19. The apparatus of claim 15, wherein inner diameter of the sealing ring is greater than diameter of an electrostatic chuck by less than about 0.1 millimeters.
 20. The apparatus of claim 15, wherein while the upper portion is in the second position and the sealing ring is in the fourth position, the apparatus is configured to: measure at least two temperatures of the inner chamber corresponding to at least two pressures; and determine the flow rate based on the at least two pressures and the at least two temperatures. 